what is PLL?

Short for phase-locked loop, an electronic circuit that controls an oscillator so that it maintains a constant phase angle (i.e., lock) on the frequency of an input, or reference, signal. A PLL ensures that a communication signal is locked on a specific frequency and can also be used to generate, modulate and demodulate a signal and divide a frequency.

PLL is used often in wireless communications where the oscillator is usually at the receiver and the input signal is extracted from the signal received from the remote transmitter.

PLL是一种电路，可将振荡器生成的输出信号的频率和和相位与基准信号或输入信号同步，在同步（或称为锁定）的状态下，振荡器的输出信号和基准信号之间的相位误差为零，或保持不变，如果误差变大，则控制机制将作用于振荡器，是相位误差再次减到最小值，实际上在这种反馈控制系统中，输出信号的相位被锁定成基准信号的相位，锁相环的名称就是由此而来。

原文转自：http://www.ltesting.net